TIER IV joins JST's Next-Generation Edge AI Semiconductor R&D Program to open-source AI chip designs for autonomous driving

TIER IV joins JST's Next-Generation Edge AI Semiconductor R&D Program to open-source AI chip designs for autonomous driving

TOKYO, Aug. 14, 2026 /PRNewswire/ -- TIER IV, the pioneering force behind open-source software for autonomous driving, has joined the Next-Generation Edge AI Semiconductor...

Software-defined AI chip project advances Level 4 autonomy | ADAS & Autonomous Vehicle International

Tier IV has joined the Next-Generation Edge AI Semiconductor Research and Development Program led by the Japan Science and Technology Agency (JST) to advance research and development of a software-defined system-on-chip (SoC) for Level 4 autonomous driving. Under the JST program, a research team led by Prof. Yoshihiro Kawahara of the Graduate School of Engineering at The University of Tokyo will advance research into use-case-driven, functionall…

TIER IV Joins JST's Next-Generation Edge AI Semiconductor R&D Program

TIER IV has joined the Next-Generation Edge AI Semiconductor Research and Development Program led by the Japan Science and Technology Agency (JST) to advance research and development of a software-defined system-on-chip (SoC) for Level 4 autonomous driving.

Tier IV Will Share AI Chip Designs For Self-driving Cars

TIER IV joins JST's Next-Generation Edge AI Semiconductor R&D Program to open-source AI chip designs for autonomous driving. The company is developing logic design of an AI chip to efficiently process inference for end-to-end (E2E) autonomous driving AI, with the goal of open-sourcing the design assets and associated toolchain.