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China crafts working 3nm gate-all-around transistors without EUV — stacked nanosheets target 3nm without EUV, but full node remains distant
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The Institute of Microelectronics of the Chinese Academy of Sciences demonstrated GAA transistors of stacked nanolamps manufactured with DUV lithography per dive. The result validates an experimental route to 3 nm technologies without EUV, but still does not amount to a commercial manufacturing process nor does it demonstrate that China can produce chips of that node on a large scale.
China crafts working 3nm gate-all-around transistors without EUV — stacked nanosheets target 3nm without EUV, but full node remains distant
As China's IMECAS demonstrates its ability to build GAA transistors without using DUV tools allegedly for 3nm-class process technology, the country remains years away from any practical implementation of a 3nm-class node.
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