A novel chip-on-wafer platform for next-generation AI hardware
5 Articles
5 Articles
A novel chip-on-wafer platform for next-generation AI hardware
A new semiconductor integration platform developed at the Institute of Science Tokyo combines advanced chip packaging with high-density interconnects and improved thermal management. This combination of three complementary technologies helps overcome the key challenges in building high-performance artificial intelligence (AI) hardware.
Intel and Lens Technology Collaborate to Enable Advanced Semiconductor Packaging for the AI Era
Intel Corporation and Lens Technology announced a strategic collaboration focused on enabling new technologies for advanced semiconductor packaging.Through this work, the companies intend to explore opportunities to accelerate the development of glass substrate-based packaging solutions that can help enable higher performance, increased interconnect density, and improved power efficiency for future computing platforms. Intel and Lens […] The pos…
Intel Advances AI Capabilities with Cutting-Edge Chip Packaging in New Mexico
As artificial intelligence (AI) prompts a revolution in computing, the semiconductor industry is innovating rapidly to meet escalating demand. Intel’s recent advancements in chip packaging technology, particularly through its facilities in Rio Rancho, New Mexico, promise to reshape the landscape for small businesses reliant on cutting-edge technology. Advancements in semiconductor technology have moved from relying solely on large, singular chip…
Intel’s recent history is one of resilience and rebirth. The company that came to be evicted in the technological field is now on the verge of regaining its relevance as the most important manufacturer of chips of American origin. On its way, Mexico will play a key role in its potential in chip design, as well as in its assembly, testing and packaging.
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